Conventionally, solid-state imaging devices used in video cameras, digital still cameras, and the like adopt a CCD solid-state imaging device (CCD indicates “charge coupled device”). Such a CCD solid-state imaging device includes a photodiode, a vertical charge transfer portion (vertical CCD), a horizontal charge transfer portion (horizontal CCD), a charge detection portion (FD portion), and an output amplifier. The photodiode generates signal charge by means of photoelectric conversion, and the vertical CCD and the horizontal CCD transfer the signal charge to the FD portion, and the FD portion detects the signal charge.
In recent years, CCD solid-state imaging devices of the above-stated structure are required to realize high pixel densities for higher resolution as well as size reduction of the apparatuses themselves. There have already been attempts for improving charge transfer portions so as to restrain deterioration in signal charge caused by untransferred charge and the like as well as to satisfy the mentioned requests (e.g. Patent reference 1).
As shown in the schematic cross sections of FIG. 17, a charge transfer portion is formed after undergoing: an oxide layer forming step of forming an oxide layer 92 on a semiconductor substrate 91; an ion implantation step of ion-implanting p-type impurity such as boron (B) through the oxide layer 92 to form a p-well and then ion-implanting n-type impurity such as arsenic (As) and phosphorus (P) through the oxide layer 92 thereby forming an n-well of the charge transfer portion; an insulation-layer forming step of removing the oxide layer 92 and then performing thermal oxidation to form a gate insulation layer 93; and a gate-electrode forming step of forming a gate electrode 94 on the gate insulation layer 93.
When a charge transfer portion is formed using the above-stated method, the resulting insulation layer 93 will have a uniform layer thickness for each of the vertical CCD, the horizontal CCD, and the output amplifier. However, since the ideal layer thickness is different among the vertical CCD, the horizontal CCD, and the output amplifier, several methods of forming a gate insulation layer having an ideal layer thickness have been already disclosed. For example, Patent reference 2 realizes the ideal layer thickness by utilizing characteristics of a so-called ONO insulation layer.
Patent reference 1:
Japanese Laid-open Patent Application No. H08-288492
Patent reference 2:
Japanese Patent No. 3162440
The charge transfer portion includes a high potential area for accumulating signal charge, and so is provided with a so-called buried channel that functions to prevent signal charge from accumulating at the substrate's surface. In the ion implantation step, the peak concentration of the impurity concentration distribution of the implanted ion (i.e. impurity) is set to be positioned within the silicon substrate, for the purpose of successful provision of the stated high potential area within the silicon substrate.
Immediately after the ion implantation, the above-stated setting is effective at providing the substrate with an impurity concentration distribution favorable enough to form a predetermined charge accumulation area. After the insulation layer forming step, however, the favorable impurity concentration distribution cannot be maintained, incurring reduction in saturated signal amount that can be accumulated within the substrate, or occurrence of shading due to loss in transfer charge amount. In particular, if each one of pixels is subjected to the mentioned problems as the pixel densities become higher, it will lead to noticeable deterioration in the display function.
The present invention has been conceived in view of the stated problems, and has an object of providing a manufacturing method of a CCD solid-state imaging device having such an impurity concentration distribution with which shading is reduced and formation of a buried channel endowed with a large saturated signal charge amount is made possible.